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National Repository of Grey Literature 3 records found  Search took 0.01 seconds. 
Design of the PLL
 Hejlek, Pavel ; Háze, Jiří (referee) ; Prokop, Roman (advisor)
This work is dealing with phase lock loop design. In the theoretical part is principal description. In the practical part is detailed mathematical description, choice of various blocks, design calculation and optimalization of final solution. Designed solution is simulated and final result are commented.
Detailed record
Design of low-frequency phase locked loop for sensing applications in low-voltage TSMC 0.18 um process
 Svoboda, Marek ; Dvořák, Radek (referee) ; Šotner, Roman (advisor)
The work deals with the design of FM modulation chains and their sub-circuits, which construction is based on analog multipliers produced in the TSCM process 0.18 m 1.8 V. One chain operate with a rectangular carrier and the other one with a harmonic carrier wave. The basic carrier frequency is 100 kHz, and the basic test modulation signal is 1 kHz harmonic waveform. Demodulators are built on the principle of the phase-locked loop, and the aim of the work is to verify the functionality of such a loop and to determine its limiting properties. The work also contains graphical outputs from the Cadence Virtuoso development package, in which all simulations were performed.
Detailed record
Design of the PLL
 Hejlek, Pavel ; Háze, Jiří (referee) ; Prokop, Roman (advisor)
This work is dealing with phase lock loop design. In the theoretical part is principal description. In the practical part is detailed mathematical description, choice of various blocks, design calculation and optimalization of final solution. Designed solution is simulated and final result are commented.
Detailed record

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